Digital Electronics for GATE (Video Course)

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#Chapter Name
1Digital Electronics Overview
2Introduction to Number Systems & base or radix
3Find out the base or radix
4Decimal to any other Number System Conversion
5Binary Equivalent of Decimal Number
6Decimal to Octal Number Example
7Octal equivalent of Decimal Number
8Hexadecimal Equivalent of Decimal Number
9Decimal to Binary and Hexa Conversion Example
10Any other number system into decimal
11Decimal Equivalent of Binary Number
12Decimal Equivalent of Binary Number Example
13Octal to Decimal Number Conversion
14Octal to Decimal Number Example
15Hexadecimal to Decimal Number Conversion
16Hexadecimal to Decimal Number Example
17Octal to Binary Number Conversion
18Binary to Octal Conversion Example
19Hexadecimal to Binary and Binary to Hexa Conversion
20Hexa to Binary Conversion Example 1
21Hexa to Binary Conversion Example 2
22Hexa to Octal & Octal to Hexa Number Conversion
23Octal to Hexa Conversions Example 1
24Octal to Hexa Conversions Example 2
25Octal to Hexa Conversions Example 3
26Hexa to Octal Conversion Example 1
27Hexa to Octal Conversion Example 2
28Minimal Decimal Equivalent
29Required bits to Represent a Number - Part A
30Required bits to Represent a Number - Part B
31Match the List Octal Binary
32Find Unknown Value in a Relation
33Conversions Examples - Part 1
34Conversions Examples - Part 2
35Binary Coded Pentory Problem
36Signed Magnitude Representation
371s & 2s Complement Representation of Signed Numbers (complement representation)
382's Complement Representation Example
392's Complement Representation Previous GATE Problem 1
402's Complement Representation Previous GATE Problem 2
412's Complement Representation Previous GATE Problem 3
422's Complement Representation Previous GATE Problem 4
432's Complement Representation Previous GATE Problem 5
44Binary Arithmetic Addition
45Binary Arithmetic Subtraction
46Binary Arithmetic Multiplication
47Binary arithmetic Multiplication Example
48Binary Arithmetic Division
49Introduction to Complement Subtraction
501’s Complement Subtraction Smaller to Larger
511’s Complement Subtraction Smaller from Larger Example
521’s Complement Subtraction Larger to Smaller
531’s Complement Subtraction Larger from Smaller Example
542’s Complement Subtraction Smaller from Larger
552’s Complement Subtraction Smaller from Larger Example
562’s Complement Subtraction Larger from Smaller
572’s Complement Subtraction Previous GATE Problem
58Introduction to 15's and 16's Complement
59Hexadecimal Addition
60Hexadecimal Subtraction
6115’s Complement Subtraction Smaller from Larger
6215’s Complement Subtraction Smaller from Larger Examples
6315’s Complement Subtraction Larger from Smaller
6416’s Complement Subtraction Smaller from Larger
6516’s Complement Subtraction Larger from Smaller
6615’s Complement and 16s Complement Subtraction Examples
67Classification of Binary Codes
68BCD Code (Binary Coded Decimal)
69BCD Addition
709s Complement and 10s Complement
71BCD Subtraction using 9’s Complement
72BCD Subtraction using 9’s Complement Example
73BCD Subtraction using 10's Complement
74BCD Subtraction using 10's Complement Example
75Excess-3 Code
76Excess 3 Addition
77Excess-3 Addition Example
78Excess 3 Code Subtraction using 9s Complement
79Excess-3 Subtraction using 9’s Complement Example
80Excess-3 Subtraction using 10’s Complement
81Excess-3 Subtraction using 10’s Complement Example
82Gray Code & Conversion Binary to Gray
83Gray to Binary Conversion
84ASCII Code
85Introduction to Logic Gates & Boolean Algebra
86Introduction to Logic Gates
87AND Gate
88OR Gate
89NOT Gate
90NAND Gate
91NOR Gate
92EX-OR Gate
93EX NOR Gate
94Alternate Gate
95Properties of EX-OR Gate
96NAND Realization
97NOR Realization
98X-OR Gate Example
99Logic Gates Example
100Implement AND & NAND Gates
101Back Propagation Problem Example
102NAND Realization Example
103Fundamentals of Boolean Algebra
104Theorem's of Boolean Algebra
105Stuck-at-1 Fault in Logic Circuit
106Dual of Boolean Expression
107Properties of Boolean Algebra
108Boolean Equation Representation Literal
109Boolean Expression Representation in Sum of Products Form
110Boolean Expression Representation in Product of Sum Form
111Boolean Expression Representation using Canonical Form
112Min-Terms and Max-Terms in Boolean Algebra
113Converting SOP to SSOP
114Converting POS to SPOS
115Converting SSOP to SPOS
116Logic Gates GATE Problem Example
117Distributive Property GATE Problem Example
118Propagation Delay & Example
119Propagation Delay GATE Problem Example
120Transposition Property GATE Problem Example
121Logic Gates using BASIC Propagation Method GATE Problem Example
122Karnaugh Map (K-Map)
123Rules for K-Map Simplification Part 1
124Rules for K-Map Simplification Part 2
125K-Maps GATE Problem Example 1
126K-Maps GATE Problem Example 2
127Boolean Expression Solving using K-Map
128Don’t care & Problem
129Boolean Expression using K-Map GATE Problem Example
130POS Expression using K-Map GATE Problem Example
131K-Map & Logic Circuit Design GATE Problem Example
132Expression Solving using Boolean Law
133Introduction to Combinational Circuits
134Designing Steps for a Combinational Circuit
135Combinational Circuit Design GATE Problem Example
136Design of Half Adder
137Designing of Full Adder
138Half Subtractor
139Full Subtractor
140N Bit Parallel Adder 4 Bit Parallel Adder
1414-Bit Parallel Adder cum Subtractor
142Designing of Full Adder using Half Adder
143Carry Generation in Carry Look Ahead Adder
144Carry Look Ahead Adder
145BCD Adder
146Excess-3 Adder
147Comparators Part 1
148Comparators Part 2
149Binary to Gray Code Converter
150Code converter Binary to BCD
151Parity Bit & Check Bit
152Odd Parity Generator
153Even Parity Generator
1542 to 4 Decoder Design
1553 to 8 Decoder Design
156Multiplexer (MUX) 2 X 1MUX Design
157MUX Problem Part-1
158MUX Problem Part-2
1594X1 MUX
160MUX GATE problem Example part 1
161MUX GATE problem Example part 2
162MUX GATE problem Example part 3
163Introduction of Hamming Code
164Hamming Code Generation with an Example
165Hamming Code Generation Example with Even Parity
166Hamming Code Generation Example with Odd Parity
167Error Correction in Hamming Code
168Error Detection and Correction in Hamming Code
169Introduction to Sequential Circuits
170S-R Latch using NOR gates
171S-R Latch with NAND Gates
172S-R Flip Flop
173Equation for S-R Flip Flop
174D Flip Flop
175J-K Flip Flop
176T Flip Flop
177Equation for J-K Flip Flop
178Race Around Condition in J-K Flip Flop
179Excitation Table for S-R Flip Flop
180Excitation Table for D Flip Flop
181Excitation Table for J-K Flip Flop
182Excitation Table for T Flip Flop
183Flip-Flop Conversion Process Steps
184S-R to D Flip Flop Conversion
185S-R to J-K Flip Flop Conversion
186S-R to T Flip Flop Conversion
187J-K to T Flip Flop Conversion
188J-K to D Flip Flop conversion
189T to D Flip Flop Conversion
190D to T Flip-Flop Conversion
191Propagation Delay
192Flip-Flop Conversion GATE Problem Example
193Race Around Condition GATE Problem Example
194Applications of Flip-Flop
195Universal Shift Register
196Serial in Parallel out Shift Register
197Serial in Serial out Shift Register
198Shift Register Problem Example 1
199Shift Register Problem Example 2
200Introduction of Counter
201Introduction of Asynchronous Counter
202Ripple Up Counter
203Ripple Down Counter
204Synchronous Counter
205Ring Counter or Shift Register Counter
206Twisted Ring Counter or Johnson’s Counter
207Johnson’s Counter GATE Problem Example
208Ripple Counter Problem Example
209Synchronous Counters GATE Problem Example
210Modulus of Counter
211Counters Problem Example 1
212Counters Problem Example 2
213Asynchronous & Direct Inputs
214MOD 3 Asynchronous Counter
215MOD 12 Counter
216MOD Counter Example
217Introduction to Logic Families
218Characteristics of Logic Families
219Resistor Transistor Logic (RTL)
220Direct Coupled Transistor Logic
221Diode Transistor Logic NAND Gate
222Diode Transistor Logic NOR Gate
223Transistor Transistor Logic
224Versions in Transistor Transistor Logic
225PMOS & NMOS Inverter
226CMOS Inverter
227PMOS NAND Gate
228PMOS NOR Gate
229Designing of Universal Gates using NMOS
230CMOS NAND Gate
231CMOS NOR Gate
232Comparision of Logic Families
233Semi Conductor Memories
234ROM (Non Volatile)
235RAM (Volatile)
236Difference Between SRAM & DRAM
237Introduction to Data Converters
238Binary Weighted Resistor DAC
239R-2R Ladder DAC (Voltage Switched)
240R-2R Ladder DAC (Current Switched)
241Counter type ADC
242Successive Approximation type ADC
243Flash Parallel type ADC
244Dual Slope or Integrating type ADC
245Sigma Delta ADC
246ADC Problem Example
247Resolution of DAC
248ADC GATE Model Example 1
249ADC GATE Model Example 2
250Flash ADC GATE Model Example
251Resolution of DAC GATE Model Example

  • Digital Electronics Overview
  • Introduction to Number Systems & base or radix
  • Find out the base or radix
  • Decimal to any other Number System Conversion
  • Binary Equivalent of Decimal Number
  • Decimal to Octal Number Example
  • Octal equivalent of Decimal Number
  • Hexadecimal Equivalent of Decimal Number
  • Decimal to Binary and Hexa Conversion Example
  • Any other number system into decimal
  • Decimal Equivalent of Binary Number
  • Decimal Equivalent of Binary Number Example
  • Octal to Decimal Number Conversion
  • Octal to Decimal Number Example
  • Hexadecimal to Decimal Number Conversion
  • Hexadecimal to Decimal Number Example
  • Octal to Binary Number Conversion
  • Binary to Octal Conversion Example
  • Hexadecimal to Binary and Binary to Hexa Conversion
  • Hexa to Binary Conversion Example 1
  • Hexa to Binary Conversion Example 2
  • Hexa to Octal & Octal to Hexa Number Conversion
  • Octal to Hexa Conversions Example 1
  • Octal to Hexa Conversions Example 2
  • Octal to Hexa Conversions Example 3
  • Hexa to Octal Conversion Example 1
  • Hexa to Octal Conversion Example 2
  • Minimal Decimal Equivalent
  • Required bits to Represent a Number - Part A
  • Required bits to Represent a Number - Part B
  • Match the List Octal Binary
  • Find Unknown Value in a Relation
  • Conversions Examples - Part 1
  • Conversions Examples - Part 2
  • Binary Coded Pentory Problem
  • Signed Magnitude Representation
  • 1s & 2s Complement Representation of Signed Numbers (complement representation)
  • 2's Complement Representation Example
  • 2's Complement Representation Previous GATE Problem 1
  • 2's Complement Representation Previous GATE Problem 2
  • 2's Complement Representation Previous GATE Problem 3
  • 2's Complement Representation Previous GATE Problem 4
  • 2's Complement Representation Previous GATE Problem 5
  • Binary Arithmetic Addition
  • Binary Arithmetic Subtraction
  • Binary Arithmetic Multiplication
  • Binary arithmetic Multiplication Example
  • Binary Arithmetic Division
  • Introduction to Complement Subtraction
  • 1’s Complement Subtraction Smaller to Larger
  • 1’s Complement Subtraction Smaller from Larger Example
  • 1’s Complement Subtraction Larger to Smaller
  • 1’s Complement Subtraction Larger from Smaller Example
  • 2’s Complement Subtraction Smaller from Larger
  • 2’s Complement Subtraction Smaller from Larger Example
  • 2’s Complement Subtraction Larger from Smaller
  • 2’s Complement Subtraction Previous GATE Problem
  • Introduction to 15's and 16's Complement
  • Hexadecimal Addition
  • Hexadecimal Subtraction
  • 15’s Complement Subtraction Smaller from Larger
  • 15’s Complement Subtraction Smaller from Larger Examples
  • 15’s Complement Subtraction Larger from Smaller
  • 16’s Complement Subtraction Smaller from Larger
  • 16’s Complement Subtraction Larger from Smaller
  • 15’s Complement and 16s Complement Subtraction Examples
  • Classification of Binary Codes
  • BCD Code (Binary Coded Decimal)
  • BCD Addition
  • 9s Complement and 10s Complement
  • BCD Subtraction using 9’s Complement
  • BCD Subtraction using 9’s Complement Example
  • BCD Subtraction using 10's Complement
  • BCD Subtraction using 10's Complement Example
  • Excess-3 Code
  • Excess 3 Addition
  • Excess-3 Addition Example
  • Excess 3 Code Subtraction using 9s Complement
  • Excess-3 Subtraction using 9’s Complement Example
  • Excess-3 Subtraction using 10’s Complement
  • Excess-3 Subtraction using 10’s Complement Example
  • Gray Code & Conversion Binary to Gray
  • Gray to Binary Conversion
  • ASCII Code
  • Introduction to Logic Gates & Boolean Algebra
  • Introduction to Logic Gates
  • AND Gate
  • OR Gate
  • NOT Gate
  • NAND Gate
  • NOR Gate
  • EX-OR Gate
  • EX NOR Gate
  • Alternate Gate
  • Properties of EX-OR Gate
  • NAND Realization
  • NOR Realization
  • X-OR Gate Example
  • Logic Gates Example
  • Implement AND & NAND Gates
  • Back Propagation Problem Example
  • NAND Realization Example
  • Fundamentals of Boolean Algebra
  • Theorem's of Boolean Algebra
  • Stuck-at-1 Fault in Logic Circuit
  • Dual of Boolean Expression
  • Properties of Boolean Algebra
  • Boolean Equation Representation Literal
  • Boolean Expression Representation in Sum of Products Form
  • Boolean Expression Representation in Product of Sum Form
  • Boolean Expression Representation using Canonical Form
  • Min-Terms and Max-Terms in Boolean Algebra
  • Converting SOP to SSOP
  • Converting POS to SPOS
  • Converting SSOP to SPOS
  • Logic Gates GATE Problem Example
  • Distributive Property GATE Problem Example
  • Propagation Delay & Example
  • Propagation Delay GATE Problem Example
  • Transposition Property GATE Problem Example
  • Logic Gates using BASIC Propagation Method GATE Problem Example
  • Karnaugh Map (K-Map)
  • Rules for K-Map Simplification Part 1
  • Rules for K-Map Simplification Part 2
  • K-Maps GATE Problem Example 1
  • K-Maps GATE Problem Example 2
  • Boolean Expression Solving using K-Map
  • Don’t care & Problem
  • Boolean Expression using K-Map GATE Problem Example
  • POS Expression using K-Map GATE Problem Example
  • K-Map & Logic Circuit Design GATE Problem Example
  • Expression Solving using Boolean Law
  • Introduction to Combinational Circuits
  • Designing Steps for a Combinational Circuit
  • Combinational Circuit Design GATE Problem Example
  • Design of Half Adder
  • Designing of Full Adder
  • Half Subtractor
  • Full Subtractor
  • N Bit Parallel Adder 4 Bit Parallel Adder
  • 4-Bit Parallel Adder cum Subtractor
  • Designing of Full Adder using Half Adder
  • Carry Generation in Carry Look Ahead Adder
  • Carry Look Ahead Adder
  • BCD Adder
  • Excess-3 Adder
  • Comparators Part 1
  • Comparators Part 2
  • Binary to Gray Code Converter
  • Code converter Binary to BCD
  • Parity Bit & Check Bit
  • Odd Parity Generator
  • Even Parity Generator
  • 2 to 4 Decoder Design
  • 3 to 8 Decoder Design
  • Multiplexer (MUX) 2 X 1MUX Design
  • MUX Problem Part-1
  • MUX Problem Part-2
  • 4X1 MUX
  • MUX GATE problem Example part 1
  • MUX GATE problem Example part 2
  • MUX GATE problem Example part 3
  • Introduction of Hamming Code
  • Hamming Code Generation with an Example
  • Hamming Code Generation Example with Even Parity
  • Hamming Code Generation Example with Odd Parity
  • Error Correction in Hamming Code
  • Error Detection and Correction in Hamming Code
  • Introduction to Sequential Circuits
  • S-R Latch using NOR gates
  • S-R Latch with NAND Gates
  • S-R Flip Flop
  • Equation for S-R Flip Flop
  • D Flip Flop
  • J-K Flip Flop
  • T Flip Flop
  • Equation for J-K Flip Flop
  • Race Around Condition in J-K Flip Flop
  • Excitation Table for S-R Flip Flop
  • Excitation Table for D Flip Flop
  • Excitation Table for J-K Flip Flop
  • Excitation Table for T Flip Flop
  • Flip-Flop Conversion Process Steps
  • S-R to D Flip Flop Conversion
  • S-R to J-K Flip Flop Conversion
  • S-R to T Flip Flop Conversion
  • J-K to T Flip Flop Conversion
  • J-K to D Flip Flop conversion
  • T to D Flip Flop Conversion
  • D to T Flip-Flop Conversion
  • Propagation Delay
  • Flip-Flop Conversion GATE Problem Example
  • Race Around Condition GATE Problem Example
  • Applications of Flip-Flop
  • Universal Shift Register
  • Serial in Parallel out Shift Register
  • Serial in Serial out Shift Register
  • Shift Register Problem Example 1
  • Shift Register Problem Example 2
  • Introduction of Counter
  • Introduction of Asynchronous Counter
  • Ripple Up Counter
  • Ripple Down Counter
  • Synchronous Counter
  • Ring Counter or Shift Register Counter
  • Twisted Ring Counter or Johnson’s Counter
  • Johnson’s Counter GATE Problem Example
  • Ripple Counter Problem Example
  • Synchronous Counters GATE Problem Example
  • Modulus of Counter
  • Counters Problem Example 1
  • Counters Problem Example 2
  • Asynchronous & Direct Inputs
  • MOD 3 Asynchronous Counter
  • MOD 12 Counter
  • MOD Counter Example
  • Introduction to Logic Families
  • Characteristics of Logic Families
  • Resistor Transistor Logic (RTL)
  • Direct Coupled Transistor Logic
  • Diode Transistor Logic NAND Gate
  • Diode Transistor Logic NOR Gate
  • Transistor Transistor Logic
  • Versions in Transistor Transistor Logic
  • PMOS & NMOS Inverter
  • CMOS Inverter
  • PMOS NAND Gate
  • PMOS NOR Gate
  • Designing of Universal Gates using NMOS
  • CMOS NAND Gate
  • CMOS NOR Gate
  • Comparision of Logic Families
  • Semi Conductor Memories
  • ROM (Non Volatile)
  • RAM (Volatile)
  • Difference Between SRAM & DRAM
  • Introduction to Data Converters
  • Binary Weighted Resistor DAC
  • R-2R Ladder DAC (Voltage Switched)
  • R-2R Ladder DAC (Current Switched)
  • Counter type ADC
  • Successive Approximation type ADC
  • Flash Parallel type ADC
  • Dual Slope or Integrating type ADC
  • Sigma Delta ADC
  • ADC Problem Example
  • Resolution of DAC
  • ADC GATE Model Example 1
  • ADC GATE Model Example 2
  • Flash ADC GATE Model Example
  • Resolution of DAC GATE Model Example