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| # | Chapter Name |
|---|---|
| 1 | Digital Electronics Overview |
| 2 | Introduction to Number Systems & base or radix |
| 3 | Find out the base or radix |
| 4 | Decimal to any other Number System Conversion |
| 5 | Binary Equivalent of Decimal Number |
| 6 | Decimal to Octal Number Example |
| 7 | Octal equivalent of Decimal Number |
| 8 | Hexadecimal Equivalent of Decimal Number |
| 9 | Decimal to Binary and Hexa Conversion Example |
| 10 | Any other number system into decimal |
| 11 | Decimal Equivalent of Binary Number |
| 12 | Decimal Equivalent of Binary Number Example |
| 13 | Octal to Decimal Number Conversion |
| 14 | Octal to Decimal Number Example |
| 15 | Hexadecimal to Decimal Number Conversion |
| 16 | Hexadecimal to Decimal Number Example |
| 17 | Octal to Binary Number Conversion |
| 18 | Binary to Octal Conversion Example |
| 19 | Hexadecimal to Binary and Binary to Hexa Conversion |
| 20 | Hexa to Binary Conversion Example 1 |
| 21 | Hexa to Binary Conversion Example 2 |
| 22 | Hexa to Octal & Octal to Hexa Number Conversion |
| 23 | Octal to Hexa Conversions Example 1 |
| 24 | Octal to Hexa Conversions Example 2 |
| 25 | Octal to Hexa Conversions Example 3 |
| 26 | Hexa to Octal Conversion Example 1 |
| 27 | Hexa to Octal Conversion Example 2 |
| 28 | Minimal Decimal Equivalent |
| 29 | Required bits to Represent a Number - Part A |
| 30 | Required bits to Represent a Number - Part B |
| 31 | Match the List Octal Binary |
| 32 | Find Unknown Value in a Relation |
| 33 | Conversions Examples - Part 1 |
| 34 | Conversions Examples - Part 2 |
| 35 | Binary Coded Pentory Problem |
| 36 | Signed Magnitude Representation |
| 37 | 1s & 2s Complement Representation of Signed Numbers (complement representation) |
| 38 | 2's Complement Representation Example |
| 39 | 2's Complement Representation Previous GATE Problem 1 |
| 40 | 2's Complement Representation Previous GATE Problem 2 |
| 41 | 2's Complement Representation Previous GATE Problem 3 |
| 42 | 2's Complement Representation Previous GATE Problem 4 |
| 43 | 2's Complement Representation Previous GATE Problem 5 |
| 44 | Binary Arithmetic Addition |
| 45 | Binary Arithmetic Subtraction |
| 46 | Binary Arithmetic Multiplication |
| 47 | Binary arithmetic Multiplication Example |
| 48 | Binary Arithmetic Division |
| 49 | Introduction to Complement Subtraction |
| 50 | 1ââ¬â¢s Complement Subtraction Smaller to Larger |
| 51 | 1ââ¬â¢s Complement Subtraction Smaller from Larger Example |
| 52 | 1ââ¬â¢s Complement Subtraction Larger to Smaller |
| 53 | 1ââ¬â¢s Complement Subtraction Larger from Smaller Example |
| 54 | 2ââ¬â¢s Complement Subtraction Smaller from Larger |
| 55 | 2ââ¬â¢s Complement Subtraction Smaller from Larger Example |
| 56 | 2ââ¬â¢s Complement Subtraction Larger from Smaller |
| 57 | 2ââ¬â¢s Complement Subtraction Previous GATE Problem |
| 58 | Introduction to 15's and 16's Complement |
| 59 | Hexadecimal Addition |
| 60 | Hexadecimal Subtraction |
| 61 | 15ââ¬â¢s Complement Subtraction Smaller from Larger |
| 62 | 15ââ¬â¢s Complement Subtraction Smaller from Larger Examples |
| 63 | 15ââ¬â¢s Complement Subtraction Larger from Smaller |
| 64 | 16ââ¬â¢s Complement Subtraction Smaller from Larger |
| 65 | 16ââ¬â¢s Complement Subtraction Larger from Smaller |
| 66 | 15ââ¬â¢s Complement and 16s Complement Subtraction Examples |
| 67 | Classification of Binary Codes |
| 68 | BCD Code (Binary Coded Decimal) |
| 69 | BCD Addition |
| 70 | 9s Complement and 10s Complement |
| 71 | BCD Subtraction using 9ââ¬â¢s Complement |
| 72 | BCD Subtraction using 9ââ¬â¢s Complement Example |
| 73 | BCD Subtraction using 10's Complement |
| 74 | BCD Subtraction using 10's Complement Example |
| 75 | Excess-3 Code |
| 76 | Excess 3 Addition |
| 77 | Excess-3 Addition Example |
| 78 | Excess 3 Code Subtraction using 9s Complement |
| 79 | Excess-3 Subtraction using 9ââ¬â¢s Complement Example |
| 80 | Excess-3 Subtraction using 10ââ¬â¢s Complement |
| 81 | Excess-3 Subtraction using 10ââ¬â¢s Complement Example |
| 82 | Gray Code & Conversion Binary to Gray |
| 83 | Gray to Binary Conversion |
| 84 | ASCII Code |
| 85 | Introduction to Logic Gates & Boolean Algebra |
| 86 | Introduction to Logic Gates |
| 87 | AND Gate |
| 88 | OR Gate |
| 89 | NOT Gate |
| 90 | NAND Gate |
| 91 | NOR Gate |
| 92 | EX-OR Gate |
| 93 | EX NOR Gate |
| 94 | Alternate Gate |
| 95 | Properties of EX-OR Gate |
| 96 | NAND Realization |
| 97 | NOR Realization |
| 98 | X-OR Gate Example |
| 99 | Logic Gates Example |
| 100 | Implement AND & NAND Gates |
| 101 | Back Propagation Problem Example |
| 102 | NAND Realization Example |
| 103 | Fundamentals of Boolean Algebra |
| 104 | Theorem's of Boolean Algebra |
| 105 | Stuck-at-1 Fault in Logic Circuit |
| 106 | Dual of Boolean Expression |
| 107 | Properties of Boolean Algebra |
| 108 | Boolean Equation Representation Literal |
| 109 | Boolean Expression Representation in Sum of Products Form |
| 110 | Boolean Expression Representation in Product of Sum Form |
| 111 | Boolean Expression Representation using Canonical Form |
| 112 | Min-Terms and Max-Terms in Boolean Algebra |
| 113 | Converting SOP to SSOP |
| 114 | Converting POS to SPOS |
| 115 | Converting SSOP to SPOS |
| 116 | Logic Gates GATE Problem Example |
| 117 | Distributive Property GATE Problem Example |
| 118 | Propagation Delay & Example |
| 119 | Propagation Delay GATE Problem Example |
| 120 | Transposition Property GATE Problem Example |
| 121 | Logic Gates using BASIC Propagation Method GATE Problem Example |
| 122 | Karnaugh Map (K-Map) |
| 123 | Rules for K-Map Simplification Part 1 |
| 124 | Rules for K-Map Simplification Part 2 |
| 125 | K-Maps GATE Problem Example 1 |
| 126 | K-Maps GATE Problem Example 2 |
| 127 | Boolean Expression Solving using K-Map |
| 128 | Donââ¬â¢t care & Problem |
| 129 | Boolean Expression using K-Map GATE Problem Example |
| 130 | POS Expression using K-Map GATE Problem Example |
| 131 | K-Map & Logic Circuit Design GATE Problem Example |
| 132 | Expression Solving using Boolean Law |
| 133 | Introduction to Combinational Circuits |
| 134 | Designing Steps for a Combinational Circuit |
| 135 | Combinational Circuit Design GATE Problem Example |
| 136 | Design of Half Adder |
| 137 | Designing of Full Adder |
| 138 | Half Subtractor |
| 139 | Full Subtractor |
| 140 | N Bit Parallel Adder 4 Bit Parallel Adder |
| 141 | 4-Bit Parallel Adder cum Subtractor |
| 142 | Designing of Full Adder using Half Adder |
| 143 | Carry Generation in Carry Look Ahead Adder |
| 144 | Carry Look Ahead Adder |
| 145 | BCD Adder |
| 146 | Excess-3 Adder |
| 147 | Comparators Part 1 |
| 148 | Comparators Part 2 |
| 149 | Binary to Gray Code Converter |
| 150 | Code converter Binary to BCD |
| 151 | Parity Bit & Check Bit |
| 152 | Odd Parity Generator |
| 153 | Even Parity Generator |
| 154 | 2 to 4 Decoder Design |
| 155 | 3 to 8 Decoder Design |
| 156 | Multiplexer (MUX) 2 X 1MUX Design |
| 157 | MUX Problem Part-1 |
| 158 | MUX Problem Part-2 |
| 159 | 4X1 MUX |
| 160 | MUX GATE problem Example part 1 |
| 161 | MUX GATE problem Example part 2 |
| 162 | MUX GATE problem Example part 3 |
| 163 | Introduction of Hamming Code |
| 164 | Hamming Code Generation with an Example |
| 165 | Hamming Code Generation Example with Even Parity |
| 166 | Hamming Code Generation Example with Odd Parity |
| 167 | Error Correction in Hamming Code |
| 168 | Error Detection and Correction in Hamming Code |
| 169 | Introduction to Sequential Circuits |
| 170 | S-R Latch using NOR gates |
| 171 | S-R Latch with NAND Gates |
| 172 | S-R Flip Flop |
| 173 | Equation for S-R Flip Flop |
| 174 | D Flip Flop |
| 175 | J-K Flip Flop |
| 176 | T Flip Flop |
| 177 | Equation for J-K Flip Flop |
| 178 | Race Around Condition in J-K Flip Flop |
| 179 | Excitation Table for S-R Flip Flop |
| 180 | Excitation Table for D Flip Flop |
| 181 | Excitation Table for J-K Flip Flop |
| 182 | Excitation Table for T Flip Flop |
| 183 | Flip-Flop Conversion Process Steps |
| 184 | S-R to D Flip Flop Conversion |
| 185 | S-R to J-K Flip Flop Conversion |
| 186 | S-R to T Flip Flop Conversion |
| 187 | J-K to T Flip Flop Conversion |
| 188 | J-K to D Flip Flop conversion |
| 189 | T to D Flip Flop Conversion |
| 190 | D to T Flip-Flop Conversion |
| 191 | Propagation Delay |
| 192 | Flip-Flop Conversion GATE Problem Example |
| 193 | Race Around Condition GATE Problem Example |
| 194 | Applications of Flip-Flop |
| 195 | Universal Shift Register |
| 196 | Serial in Parallel out Shift Register |
| 197 | Serial in Serial out Shift Register |
| 198 | Shift Register Problem Example 1 |
| 199 | Shift Register Problem Example 2 |
| 200 | Introduction of Counter |
| 201 | Introduction of Asynchronous Counter |
| 202 | Ripple Up Counter |
| 203 | Ripple Down Counter |
| 204 | Synchronous Counter |
| 205 | Ring Counter or Shift Register Counter |
| 206 | Twisted Ring Counter or Johnsonââ¬â¢s Counter |
| 207 | Johnsonââ¬â¢s Counter GATE Problem Example |
| 208 | Ripple Counter Problem Example |
| 209 | Synchronous Counters GATE Problem Example |
| 210 | Modulus of Counter |
| 211 | Counters Problem Example 1 |
| 212 | Counters Problem Example 2 |
| 213 | Asynchronous & Direct Inputs |
| 214 | MOD 3 Asynchronous Counter |
| 215 | MOD 12 Counter |
| 216 | MOD Counter Example |
| 217 | Introduction to Logic Families |
| 218 | Characteristics of Logic Families |
| 219 | Resistor Transistor Logic (RTL) |
| 220 | Direct Coupled Transistor Logic |
| 221 | Diode Transistor Logic NAND Gate |
| 222 | Diode Transistor Logic NOR Gate |
| 223 | Transistor Transistor Logic |
| 224 | Versions in Transistor Transistor Logic |
| 225 | PMOS & NMOS Inverter |
| 226 | CMOS Inverter |
| 227 | PMOS NAND Gate |
| 228 | PMOS NOR Gate |
| 229 | Designing of Universal Gates using NMOS |
| 230 | CMOS NAND Gate |
| 231 | CMOS NOR Gate |
| 232 | Comparision of Logic Families |
| 233 | Semi Conductor Memories |
| 234 | ROM (Non Volatile) |
| 235 | RAM (Volatile) |
| 236 | Difference Between SRAM & DRAM |
| 237 | Introduction to Data Converters |
| 238 | Binary Weighted Resistor DAC |
| 239 | R-2R Ladder DAC (Voltage Switched) |
| 240 | R-2R Ladder DAC (Current Switched) |
| 241 | Counter type ADC |
| 242 | Successive Approximation type ADC |
| 243 | Flash Parallel type ADC |
| 244 | Dual Slope or Integrating type ADC |
| 245 | Sigma Delta ADC |
| 246 | ADC Problem Example |
| 247 | Resolution of DAC |
| 248 | ADC GATE Model Example 1 |
| 249 | ADC GATE Model Example 2 |
| 250 | Flash ADC GATE Model Example |
| 251 | Resolution of DAC GATE Model Example |